What is register renaming?

1few registers

Modern CPUs run instructions out of order for speed, but they only have a handful of named registers, like R1 and R2, to work with.

2false dependency

Watch this: instruction one writes R1, instruction two also writes R1 for something totally unrelated. That second write has to wait — a fake pileup called a false dependency.

3physical pool

Register renaming solves it by keeping a much bigger pool of hidden physical registers, and giving each write its own fresh one behind the scenes.

4renamed apart

So instruction one's R1 becomes physical P1, and instruction two's R1 becomes physical P2 — different boxes, no collision, both can run at once.

5rename table

A rename table remembers the mapping — 'architectural R1 currently lives in P2' — so later reads still find the right value, even though everything ran out of order.